Lattice ECP5－5G系列FPGA视频接口协议(VIP)开发方案
Lattice公司的ECP5/ECP5-5G系列FPGA具有超过84K查找表(LUT)逻辑元件,支持个用户I/O,提供高达156个18x18乘法器和各种并行I/O标准,提供高性能的增强DSP架构,高速SERDES和高速源同步接口,采用40nm工艺技术,主要用在量大高速低成本的应用.本文介绍了ECP5/ECP5-5G系列FPGA主要特性,LFE5UM/LFE5UM5G-85器件简化框图以及视频接口协议(VIP)处理器板主要特性,框图,电路图和材料清单.
The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES and high speed source synchronous interfaces in an economical FPGA fabric. This combination is achieved through advances in device architecture and the use of 40 nm technology making the devices suitable for high-volume, high-speed, low-cost applications.
The ECP5/ECP5-5G device family covers look-up-table (LUT) capacity to 84K logic elements and supports up to 365 user I/Os. The ECP5/ECP5-5G device family also offers up to 156 18 x 18 multipliers and a wide range of parallel I/O standards.
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